Q4. Memory-mapped I/O means: a. The I/O registers are in the cache memory, The r
ID: 662349 • Letter: Q
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Q4. Memory-mapped I/O means: a. The I/O registers are in the cache memory, The registers' locations are within same main memory address space c. The I/O registers are inside the RAM, d. The I/O registers are inside the ROM Q5. The following is true about l/o requests using Interrupt a. The processor has to wait in a loop for the interrupt to arrive. O. The processor can perform other tasks in between interrupts. c. It does not require a routine to handle the l/o operation. d. None of the above. Q6. The following is true about Vectored Interrupts: The processor needs to poll the devices to check interrupt status. b. The interrupt service routines are located at fixed addresses. c, Requesting device identifies itself directly with a binary code. d. All of the above. Q7. The following is true about the Interrupt Service Routines (ISRs) for I/o requests: a. The processor starts executing the ISR after the instruction being executed at the time of interrupt is allowed to complete. b. The current value of the PC has to be stored before starting those ISRs. c. After the ISR is done, the processor returns back to the interrupted program. All of the above.Explanation / Answer
Q4. B
Memory-map IO means Memory and I/O devices use the same address space where Some addresses are used for memory cells and some are used for I/O devices.
Q5. B
While we get I/O input the processor stops its task and involve in handling input/output works otherwise performs other task.
Q6. A
Vector Interrupt indicates the interupt need to be executed while a process is running either in user more or in kernel mode. on each vector intrerupt we need to implement the process associated with vector.
Q7. B,C
As soon as we get ISR for I/O request we need to saved 5 registers i.e CS, ESP, EIP, flags, SS and need to execute the intrupt and after execution of the interupt we restore the saved registers and start the execution where we left before getting ISR.
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