Write behavioral VHDL code that implements the next state tables. Use a case sta
ID: 672740 • Letter: W
Question
Write behavioral VHDL code that implements the next state tables. Use a case statement to represent the state table. Use two processes – one for the combinational logic and one for the state register. Add an asynchronous reset input.
State
Next State
Output
X=0,1
S=0,1
000
001,000
0,0
001
011,000
0,0
011
011,110
0,0
111
011,010
0,0
010
111,110
1,0
110
111,110
0,0
Q1Q2Q3X
Q1+Q2+Q3+Z
0000
0010
0001
0000
0010
0110
0011
0000
0100
1111
0101
1100
0110
0110
0111
1100
1000
-
1001
-
1010
-
1011
-
1100
1110
1101
1100
1110
0110
1111
0100
State
Next State
Output
X=0,1
S=0,1
000
001,000
0,0
001
011,000
0,0
011
011,110
0,0
111
011,010
0,0
010
111,110
1,0
110
111,110
0,0
Explanation / Answer
library ieee;
use IEEE.std_logic_1164.all;
entity mealy is
port (clk : in std_logic;
reset : in std_logic;
input : in std_logic;
output : out std_logic
);
end mealy;
architecture behavioral of mealy is
type state_type is (s0,s1,s2,s3); --type of state machine.
signal current_s,next_s: state_type; --current and next state declaration.
begin
process (clk,reset)
begin
if (reset='1') then
current_s <= s0; --default state on reset.
elsif (rising_edge(clk)) then
current_s <= next_s; --state change.
end if;
end process;
--state machine process.
process (current_s,input)
begin
case current_s is
when s0 => --when current state is "s0"
if(input ='0') then
output <= '0';
next_s <= s1;
else
output <= '1';
next_s <= s2;
end if;
when s1 =>; --when current state is "s1"
if(input ='0') then
output <= '0';
next_s <= s3;
else
output <= '0';
next_s <= s1;
end if;
when s2 => --when current state is "s2"
if(input ='0') then
output <= '1';
next_s <= s2;
else
output <= '0';
next_s <= s3;
end if;
when s3 => --when current state is "s3"
if(input ='0') then
output <= '1';
next_s <= s3;
else
output <= '1';
next_s <= s0;
end if;
end case;
end process;
end behavioral;
Related Questions
drjack9650@gmail.com
Navigate
Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.