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The graphs below show capacitor voltage V c versus time for LC circuits 1, 2 and

ID: 1604684 • Letter: T

Question

The graphs below show capacitor voltage Vc versus time for LC circuits 1, 2 and 3 (with identical capacitances).

Mark the following statements true, false, or cannot tell.

i) The maximum charge stored on the capacitor in circuit 3 is the same as the maximum charge stored on the capacitor in circuit 1.

ii) The maximum potential difference across the inductor in circuit 1 is greater than the maximum potential difference across the capacitor in circuit 2.

iii) The maximum charge stored on the capacitor in circuit 2 is the same as the maximum charge stored on the capacitor in circuit 3.

iv) The maximum current in circuit 2 is greater than the maximum current in circuit 3.

v) L1 is greater than L3

CN Y

Explanation / Answer

Okay, Before answering, Let me tell you some important points about capacitors. Capacitor is two parallel plates not allowed to come in contact with each other. This is done by introducing an insulator "Dielectric" between the plates. The lesser the distance between the plates, more charge will be stored hence capacitance will be more. Now the ability to store charge is proportional to applied voltage. Higher the voltage, higher will the charge stored.

Q = C * V

a) This one is False because higher voltage is applied to circuit 3 and it will have higher charge than circuit 1.

b) False. The potential diference is same for inductor and capacitor

c) False. Again capacitance depnds on voltgae. voltage for circuit 3 is higher so it will have higher charge stored.

d)False. As V = IR. Current is proportional to voltage. Circuit 3 has higher voltage so it will have higher current.

e)

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