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PNP Common Emitter Amplifier Circuit Design LTSpice analysis if possible Design

ID: 1996462 • Letter: P

Question

PNP Common Emitter Amplifier Circuit Design

LTSpice analysis if possible

Design an AC-coupled common emitter amplifier with a gain of 10 and a lower frequency limit of 100 Hz. The amplifier will operate from a 15V power supply and the collector should be biased to 7.5V. The signal source will be a 50-ohm function generator. Make sure that the input impedance of the amplifier is at least 10 times greater than the source impedance. Use 2N3906 transistor. The amplifier will drive a 10k load resistor. Simulate your schematic with a transient analysis showing input and output. Use a small input signal around 100 mV and show that the gain is around 10. Simulate your schematic with an AC analysis showing that the lower corner frequency is near 100 Hz.

Explanation / Answer

The construction and terminal voltages for an NPN transistor are shown above. The PNP Transistor has very similar characteristics to their NPN bipolar cousins, except that the polarities (or biasing) of the current and voltage directions are reversed for any one of the possible three configurations, Common Base, Common Emitter and Common Collector.

The voltage between the Base and Emitter ( VBE ), is now negative at the Base and positive at the Emitter because for a PNP transistor, the Base terminal is always biased negative with respect to the Emitter.

Also the Emitter supply voltage is positive with respect to the Collector ( VCE ). So for a PNP transistor to conduct the Emitter is always more positive with respect to both the Base and the Collector.

The voltage sources are connected to a PNP transistor are as shown. This time the Emitter is connected to the supply voltage VCC with the load resistor, RL which limits the maximum current flowing through the device connected to the Collector terminal. The Base voltage VB which is biased negative with respect to the Emitter and is connected to the Base resistor RB, which again is used to limit the maximum Base current.

To cause the Base current to flow in a PNP transistor the Base needs to be more negative than the Emitter (current must leave the base) by approx 0.7 volts for a silicon device or 0.3 volts for a germanium device with the formulas used to calculate the Base resistor, Base current or Collector current are the same as those used for an equivalent NPN transistor

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