Given switch Circuit 1 and Circuit 2 below, whose output Y is connected to a dig

Question

Given switch Circuit 1 and Circuit 2 below, whose output Y is connected to a digital logic system which require a specific range of input voltages to register a logic "0" or logic "1": Draw a truth table for each circuit output Y (as well as X where appropriate) using logic "1" for SW = open and logic "0" for SW = closed. When the switch in Circuit #1 is closed it produces a transient bouncing signal due to mechanical vibration, as shown below, for a duration of T milliseconds over 3.5 bounce cycles. Calculate the required resistor and capacitor values needed for the circuit to filter ("debounce") the output so a logic circuit connected to Y will not see the results of the unintended bouncing. Use the last two digits of your student number to specify the duration of T. Example: student# = 251234567 then T = 6.7ms. If your two digits are 00, use T = 6.7ms.

Explanation / Answer

Part a:

Circuit 1:

SW                 Y                            Comments

0 ( closed )       5V ( logic ''1'')         The capacitor will charge to the voltage

1 ( open )          0V ( logic "0")         The capacitor will discharge completely and its voltage will drop to 0V

Circuit 2:

SW                 X             Y                            Comments

0 ( closed )      0             logic ''1''        The capacitor will discharge completely and its voltage will drop to 0V. Hence X will be 0V. Since the inverter input is logic 0, its output will be logic 1.

1 ( open )         Vcc ( logic "1")      logic "0"      The capacitor will charge to Vcc. Hence X will be at Vcc and the inverter output i.e., Y will be at logic 0 .

Part b:

The voltage equation for a discharging capacitor:

Vfinal = Vinitial ( e -t/RC ) => 2.5V = 5 ( e-6.7X10e-3/RC ) ( The voltage across the capacitor should not drop below 2.5V during the debouncing interval of 6.7mS )

Therefore: RC = -6.7X10e-3 / ( ln 2.5/5 ) = 9.66X10e-3

and for a charging capacitor Vcap= Vfinal ( 1- e -t/RC )

Let us consider the case of charging capacitor. Since the next stage recognises upto 1V as logic 0, when the capacitor is at logic 0, to avoid the next stage from recognising the unwanted bounces as the logic 0, the capacitor should not charge more than 1V in the bounce time of T milliseconds = 6.7mS. Substituting these values in the above equation, we get: Vcap =1V, t=6.7mS, Vfinal= 5V

RC= -t / ln( 1- Vcap /Vfinal ) = -6.7 X 10 e-3 / ln ( 1- 1/5 ) = 0.03

Assuming C = 0.1uF, then R = 0.03/ 0.1u = 3x10e5 ohms

Hence if C=0.1uF, R= 3X10e5 ohms = 300kOhms

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