Design a summing amplifier, using the circuit of Figure 5. Consider one input to
ID: 2080161 • Letter: D
Question
Design a summing amplifier, using the circuit of Figure 5. Consider one input to be the signal source Vg, which will be the signal generator in the laboratory. The other input is a dc input that will be provided by the dc power supplies connected at the two outside terminals of a 10[k] potentiometer. This configuration is also shown in Figure 5. You may consider the dc input to be the voltage at the wiper of the potentiometer. Let the partial gain of the source Vg be (-2 ±10%). The dc component of vg should be zero. The dc component of the output should range from –3[V] to +3[V], within 10%, depending on the setting of the potentiometer. That is, as the potentiometer wiper is moved from one end to the other, the dc component should change from –3[V] to +3[V]. Choose resistance values that can be common to design this circuit. Remember that R2 will comprise the 50[] resistance of the signal generator in series with the resistor you choose.
This design uses the signal generator and the two dc power supplies that are already being used to power the op-amp. Design this circuit, picking values of R1, R2, and Rf to meet the design criteria.
+15M -15M R1 VOUTExplanation / Answer
The Superposition theorem states that, for any linear system, the voltage or current in any branch of the circuit having more than one independent source, is equal to the algebraic sum of the responses caused by the independent sources acting alone, where all the sources are replaced by the internal impedances.
Applying Superposition theorem to the circuit,
a) Contribution by Vg
The partial gain for Vg is -2 ±10%
Voltage gain equation for inverting amplifier is given by,
AV = V0/VIN = - (Rf/R2)
i.e. -2 = - (Rf/R2)
i.e. Rf = 2R2 --------- (1)
b) Contribution by wiper of potentiometer
When wiper is at the top (15V), output should be -3V.
When wiper is at the bottom (-15V), output should be +3V.
Therefore, V0/VIN = -3/15 = - (Rf/R1)
i.e. 3/15 = Rf/R1 => R1 = 5Rf
Substituting (1),
R1 = 10R2
The total gain is given by,
Av = - [(Rf/R1) VPOT + (Rf/R2) VG]
(Rf/R1) VPOT introduces the required offset.
(Rf/R2) VG introduces the partial gain for the signal generator.
Now, Let us assume R2 = 1k. This implies R1 = 10k and Rf = 2k.
All the resistor values mentioned are the standard resistors.
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