In this part, use dataflow modeling techniques to model the following three Bool

Question

In this part, use dataflow modeling techniques to model the following three Boolean expressions: X = f_X(A, B, C, D) = B + CD Y = f_Y(A, B, C, D) = sigma m(5, 7, 14, 15). When modeling the Boolean variable implement each minterm individually and then "add" them together. When modeling the Boolean variable Z, use the Boolean expression that is directly derived from the logic diagram, i.e. do not use any logical simplifications or reductions. Write a Verilog program that will simulate all sixteen (16) possible input combinations. Simulate your Verilog program and provide a listing of your program and a printout of your simulation results.

Explanation / Answer

module ABCD_LOGIC(X,Y,Z,A,B,C,D);

input A,B,C,D;
output X,Y,Z;

assign X = (~B) ||(C && D);
assign Y = (~A && B && ~C && D) || (~A && B && C && D) || (A && B && C && ~D) || (A && B && C && D);
assign Z = ~(~(~(C && D) && B) && A);

endmodule

module TB_ABCD_LOGIC;

reg A1,B1,C1,D1;
reg X1,Y1,Z1;

ABCD_LOGIC(.X(X1),.Y(Y1),.Z(Z1),.A(A1),.B(B1),.C(C1),.D(D1));

integer i;

initial begin

for (i=0; i<16; i=i+1) begin
   {A1,B1,C1,D1} = i;
   #50;
end

end
endmodule

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