The memory hierarchy contains a single cache with a miss rate of 2% that holds b

Question

The memory hierarchy contains a single cache with a miss rate of 2% that holds both instructions and data. The miss penalty to access main memory is 100 cycles. 20% of the instructions are jumps, 20% are stores, 20% are loads (30% have values used in the next instruction), 10% are branches (taken 20% of the time) and 30% are ALU instructions. Jumps and branches are determined in the ID stage.

a.What is the base CPI?.

b. What is the effective CPI?

a) CPI = .20(2) + .20(1) + .20 (.30(2)) + .20(.70(1))+ .10(.20(2))+.10(.80(1))+.30 (1)

CPI= 1.28

b)???

Explanation / Answer

given single-cache miss rate = 2%

Miss penalty = 100 cycles

Base CPI (ideal cache) = 2

15% of the instructions are jumps

Load & stores are 20% of instructions

30% have values used in the next instruction

10% are branches (taken 20% of the time)

35% are ALU instructions.

Miss cycles per instruction

single-cache: 0.02 × 100 = 2

                  : 0.15 × 0.2 × 0.2 × 0.3 × 0.1× 0.2 ×0.35 ×100 = 0.00126

effective CPI = 2 + 2 + 0.00126 = 4.00126

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