design and implement sin and cos function generator using CORDIC algorithm with
ID: 2249694 • Letter: D
Question
design and implement sin and cos function generator using CORDIC algorithm with 8 CORDIC micro-rotation steps in VHDL, with input formats specified as:
X_IN: S15.12 format,
Y_IN: S15.12 format,
Z_IN (Phase/angle): S20.12 format
For 8 micro-rotation steps, the scaling factor K8=1.646743506596901.
For all problems in Parts 1, 2 and 3, please first run a behavioral (functional) simulation and make sure that your design provides the correct output. Here is one test vector for your reference,
Inputs: X_IN = 1/K8 = 1/1.646743506596901= x"????" (S15.12 format, you need to figure out the S15.12 representation), Y_IN = 0, Z_IN = 26 degree = x"1A000"
The correct outputs are: X_OUT = X"0E66"= 0.899902343750, Y_OUT = X"06F8"= 0.435546875000 and Z_OUT =X"0035C"= 000.209960937500.
Define your entity as the following:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_SIGNED.ALL;
entity SIN_COS is
Port (
CLK : in STD_LOGIC;
X_IN : in STD_LOGIC_VECTOR (14 downto 0);
Y_IN : in STD_LOGIC_VECTOR (14 downto 0);
Z_IN : in STD_LOGIC_VECTOR (19 downto 0);
X_OUT : out STD_LOGIC_VECTOR (14 downto 0);
Y_OUT : out STD_LOGIC_VECTOR (14 downto 0);
Z_OUT : out STD_LOGIC_VECTOR (19 downto 0));
end SIN_COS;
Create a testbench and perform behavioral and post-route simulations for angle inputs 10, 20, 30, 40, 50, 60, 70 and 80 degrees. Save your simulation waveform either in jpg format.
Fill up Table 1 and plot a figure with X axis as angle and Y axis as the cosine simulation outputs (decimal format) and floating-point function outputs.
Table 1. Comparison between Simulation and Floating-Point Output of COSINE
Angle (degree)
Simulation cos Output (HEX)
Simulation cos output (DEC)
Cos output using floating point function
Difference between simulation and FP
10
20
30
40
50
60
70
80
Synthesize and implement in ISE and record the hardware usage and timing results in Table 2.
Table 2. Implementation Results of Parallel CORDIC
Report
Result
Values
Device utilization Summary (from Place and Route Report)
Number of Slice Registers
Number of Slice LUTs
Number of Occupied Slices
Number of LUT Flipflop pairs used
Number of bonded IOBs
Average Fanout of Non-clock Nets
Timing from Synthesis report
Minimum Period
Maximum Frequency
Angle (degree)
Simulation cos Output (HEX)
Simulation cos output (DEC)
Cos output using floating point function
Difference between simulation and FP
10
20
30
40
50
60
70
80
Part 1: CORDIC Parallel Implementation Develop the complete VHDL code to implement a parallel CORDIC with the diagram shown as Figure 1: Figure 1. Parallel Implementation of CORDIC X IN XOUT - Y IN Z_IN CLKExplanation / Answer
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