02 Analyze the static behavior of a PLL system device given in Figure 02 (a), de

Question

02 Analyze the static behavior of a PLL system device given in Figure 02 (a), deduce the following. a) 4 Si (3 marks) i. Voltage gain, ka, for the op-amp. ii, Loop gain, k, in units of second' and in decibels (assume -1 rad/s). (6 marks) ii. Oscilloscope resulted output frequency of voltage Vo with S, open as shown in Figure 02, v. VCO output frequency, the static phase error at the phase comparator v. Hold in range 26, (2 marks) ni e ndp sked (8 marks) 3 marks) (3 marks) vi. Maximum value of Va

Explanation / Answer

(i) In an Opamp V+=V-

So Vd/1=(Vo-Vd)/4

4Vd=Vo-Vd

V0/Vd =5

Voltage gain (ka) = 5

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