Problem 4 (20 points) A synchronous video RAM buffer has a write-only port (data
ID: 2266293 • Letter: P
Question
Problem 4 (20 points) A synchronous video RAM buffer has a write-only port (data written by a processor) only port (data retrieved by a video controller). The entity declaration of this video RAM is ) and a read- shown below library ieee entity video ramis port( clk: in std logica cpu putn td ge vector (23 downto vrite da ctr _addr: in std logic vector (19 downto 0)ead address write port (processor) - addr: in atd logic vector(19 downto 0write address -write enable read port (video controller -- read data ctri_ data: in atd logic vector (23 downto 0) (a). Determine the size of this video RAM (in terms of bytes)Explanation / Answer
(a)
Read / Write address bus size of 20 bits (19 downto 0) can address 220 = 1, 048, 576 locations which often represented as 1 Mega.
Each location provides 24-bit data / 4 Bytes represented by data bus (23 downto 0).
Hence total memory size is 1 Mega x 4 Bytes = 4MB memory
(b)
------ include library (use ieee.numeric_std.all)
architecture arch of video_ram is
type mem is array (1048575 downto 0) of std_logic_vector(23 downto 0);
signal ram : mem;
begin
process (clk)
begin
if rising_edge (clk) then
if (cpu_wr = ‘1’) then
ram(to_integer unsigned(cpu_addr)) <= cpu_data;
end if;
ctrl_data <= ram(to_integer unsigned(ctrl_addr));
end if;
end process;
end arch;
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