501, Fa17 Final Exam, December 14, 2017 low two standard size notebook sheets (8

Question

501, Fa17 Final Exam, December 14, 2017 low two standard size notebook sheets (8.5 11 inches) with notes on both sides, No electronics indluding computers Page 3 of 6 lators, phones, etc. sing the truth table below complete the architecture portion of the VHDL encoder2 code below using the dutaflow model. (10 points) 0 0 0 0 0. 0 0 0 0 0 0. library IEEE: use IEEE.STD LOGIC 1164.a1l,: entity encoder2 is port( a : in sTD LOGIC VECTOR (3 downto 0) b: out STD LOGIC VECTOR (1 downto 0) nd encoder2: rchitecture bhvf encode r2 is gin Enter your dataflow code here end bhv

Explanation / Answer

From truth table

Output of encoder derives relation with inputs in the form:

b(0) = a(0) + a(1)

b(1) = a(1) + a(3) (+ indicate OR operation)

VHDL code in data flow model:

library ieee;
use ieee.std_logic_1164.all;
entity encoder2 is
port(
a:in std_logic_vector(3 downto 0);
b:out std_logic_vector(1 downto 0));
end encoder2;

architecture bhv of encoder2 is
begin

b(0)<=a(0) or a(1);
b(1)<=a(1) or a(3);

end bhv;

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