8.10 Memory-based operands We are contemplating the addition of a new set of ins

Question

8.10 Memory-based operands We are contemplating the addition of a new set of instructions to Mini shift/logic operations on the content of a register and a memory location, storing the result in the same register. For example, addm $t0,1000 ($s2) would fetch the content of memory location 1000+ ($s2) and add it to the content of register t0. Each such instruction can potentially eliminate the need for one load instruction. On the negative side, this more complex instruction would lengthen the clock cycle of the machine to 1.1 times its original value (assume that CPIs for the various instruction classes are unaffected). Considering the instruction usage distributions in Table 4.3, under what conditions would the suggested modification lead to improved performance? In other words, what raction of the load instructions must be eliminated for the ne MIPS that perform arithmetic and

Explanation / Answer

If we calculate the number of cycles for each application.

For Data Compression

Total cycles = ( 25+32+16+0+19+8) = 100

For C Language Compiler

Total cycles = ( 37+28+13+0+13+9) = 100

For Nuclear Reactor Simulation

Total cycles = ( 32+17+2+34+9+6) = 100

For Atomic Motion modelling

Total cycles = ( 37+5+1+42+10+4) = 99

Thus we find that atomic Motion modelling takes less cycles 99 while others take 100 cycles. So, Atomic Motion Modelling leads to improved performance.

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