Looking for help with problem 11? SECTION 8.8 Reduced Instruction Set Computer (

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Looking for help with problem 11?

SECTION 8.8 Reduced Instruction Set Computer (RISC) 293 8-11. A computer has 32-bit instructions and 12-bit addresses. If there are 250 two-address instructions, how many one-address instructions can be formulated? 8-12. Write a program to evaluate the arithmetic statement: a. Using a general register computer with three address instructions. b. Using a general register computer with two address instructions c. Using an accumulator type computer with one address instructions d. Using a stack organized computer with zero-address operation instruc 8-13. The memory unit of a computer has 256K words of 32 bits each. The computer has an instruction format with four fields an operation code field, a mode field to specify one of seven addressing modes, a register address field to specify one of 60 processor a memory the instruction format and the number of bits in each the in instruction is in one memory word. 8-14. A two-word instruction is stored in memory at an address designated by the symbol W. The address field of the instruction (stored at W 1 is desig nated by the symbol Y. The operand used during the execution of the instruction is stored at an address symbolized by Z. An index register contains the value X. State how Z is calculated from the other addresses if the addressing mode of the instruction is a. direct b. indirect c. relative d. indexed address 15. A relative mode branch type of instruction is stored in memory at an equivalent to decimal 750. The branch is made to an address equivalent to decimal 500. field of the instruction a. What should be the value of the relative address (in decimal)? binary using 12 bits. (Why must b. Determine the relative address value in the number be in 2's complement?) and calculate the c. Determine the binary value in PC after the fetch phase in PC plus the binary value of 500. Then show that the binary value value of 500 is eaual the binary

Explanation / Answer

we know that instructions consists of address and opcode

we have a compure with 32 bit instructions

12 two bit insruction will reserved 24 bit of instruction and remaining 8 bit will be used for opcode

we know that total number of opcodes generated using n bit instruction is 2n

so total number of instruction generated using 8 bit is 28 = 256

we have 250 two bit instruction so it will use 250 opcodes.

so we can say that we have 256 - 250 = 6 patterns left to assign to one address

number of one address instructions = 6(opcodes) * (number of bit pattern possible due to one address instruction ) = 6 * 212 = 24576

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