Consider a processor with a delayed branch that has three delay slots. Three com

Question

Consider a processor with a delayed branch that has three delay slots. Three compilers compiler A, compiler B and compiler C, could run on this processor. Compiler A can fill the first delay slot 60% of the time and the second delay slot 40% of the time and the third delay slot 20% of the time (filling delay slot is independent). Compiler B can fully fill all the three delay slots. Compiler C leaves all the slots empty.

Assuming that branches account for 20% of all instructions and arithmetic/logic operations for the remaining 80% of the instructions for any program, what is the improvement of CPI with compiler B compared to CPI with compiler A and compared to CPI with compiler C?

Assume that CPI of arithmetic/logic operations is 1.

Explanation / Answer

, performance is in the eye of the beholder! Response/Execution time - time between start and completion of a task Throughput - total amount of work done in a given time Factors that affect performance: How well the program uses the instructions of the machine............ How well the underlying hardware implements the instructions........ How well the memory and I/O systems perform............. Performance of machine X for a given program is defined as: ................. Performance (X) = 1 / Execution Time(X)............... If performance of X is better than Y:............. Execution Time (Y) > Execution Time (X)............. Performance (X) > Performance (Y)................. 1 / Execution Time(X) > 1 / Execution Time(Y) Speedup of architecture X over Y ,.................... Performance(X) / Performance(Y) = Execution Time(Y) / Execution Time(X) = n X is n times faster than Y .................................

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