A computer has a word-addressable (not byte-addressable) memory consisting of 1M

Question

A computer has a word-addressable (not byte-addressable) memory consisting of 1M 16-bit words. It also has a 4K-word cache that is 4-way set associative and in which there are 64 words per block. a. Calculate the number of bits in the tag, set index, and block offset fields of the memory address. b. Assume that the cache is initially empty. Suppose that the processor fetches 4352 words from locations 0,1,2,-4351 in that order. It then repeats this fetch sequence 9 more times. If the cache is 10x faster than the main memory, what is the improvement factor resulting from the use of the cache assuming that the LRU algorithm is used for block replacement?

Explanation / Answer

Solution

(a) 4 blocks per set, and 64 words per block means 1 set contains 256 words.

Cache is 4k word = 4096 / 256 = 16

So, it must separate to 16 sets and use 4 bits for choose set.

From 64 words per block, so it use 6 bits for choose word.

Other 6 bits is use for choose tag.

So, Word = 6 bits

Set = 4 bits

Tag = 6 bits

(b) Memory has 4352 words

4352 words/64 words per block = 68 blocks

Cache has 64 blocks, 16 sets

Initially : cache is empty, the first 64 blocks from memory can transfer to cache by don

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