5. A 1 GHz pipelined processor takes 1 cycle for an ALU instruction but all othe

Question

5. A 1 GHz pipelined processor takes 1 cycle for an ALU instruction but all other instructions take two cycles. A certain benchmark executes 900 millions instructions out of which 44% are ALU instructions. (a) Calculate the MIPS rating of the processor for this benchmark and the total execution time. (b) An optimizing compiler has been used for the above benchmark and it managed to reduce the number of executed ALU instructions by 25% and the number of the other instructions by 12.5% Repeat the calculations in (a). Is the MIPS rating an acceptable metric for the performance in this case?

Explanation / Answer

Solution:

a)

Million instructions per second(MIPS)

44% are ALU instruction which takes 1 cycle to execute

CPI= 0.44 * 1 + 0.56 * 2= 1.56

to execute one instruction it will take 1.56/10^9= 1.56 ns

MIPS= 1/1.56 * 10^9= 641.025641026 MIPS

b)

So CPI of optimized compiler is

0.44 * 0.75 * 1 + 0.56 * 0.875 * 2= 1.31

now the new MIPS is= 1/1.31 * 10^9= 763.358778626.

Yes MIPS is an acceptable metric of performance.

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