Historical Perspective and Further Reading Tis section, which appears on the CD,

Question

Historical Perspective and Further Reading Tis section, which appears on the CD, discusses the history of the first pipelined processors, the earliest superscalars, and the development of out-of-order and speculative techniques, as well as important developments in the accompanying complier technology. Contributed by Milos Prvulovic of Georgia Tech Different instructions utilize different hardware blocks in the basic single-cycle implementation. The next three problems in this exercise refer to the following instruction: What are the values of control signals generated by the control in figure 4.2 for this instruction? Which resources (blocks) perform a useful function for this instruction? Which resources (blocks) produce outputs, but their outputs are not used for this instruction? Which resources produce no outputs for this instruction?

Explanation / Answer

please rate - thanks 4.1.1 The values of the signals are as follows:               RegWrite         MemRead ALUMux MemWrite     ALUOp     RegMux   Branch a.            1                    0                       0(Reg)                0             Add           1 (ALU)     0 b.    1    1                      1(Imm)              0               Add           1 (Mem)     0 ALUMux is the control signal that controls the Mux at the ALUinput, 0 (Reg) selects the output of the register fi le and 1 (Imm)selects the immediate from the instruction word as the second inputto the ALU. RegMux is the control signal that controls the Mux atthe Data input to the register fi le, 0 (ALU) selects the output ofthe ALU and 1 (Mem) selects the output of memory. A value of X is a“don’t care” (does not matter if signal is 0 or1) 4.1.2 Resources performing a useful function for this instructionare: a. All except Data Memory and branch Add unit b. All except branch Add unit and second read port of theRegisters 4.1.3                          Outputs that are notused                                       No outputs a.                         BranchAdd                                                       Data Memory b.                    Branch Add, second read port ofRegisters                 None (all units produce outputs)

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