The pipeline itself comprises a whole task that has been broken out into smaller

Question

The pipeline itself comprises a whole task that has been broken out into smaller sub-tasks. The concept actually has its roots in mass production manufacturing plants, such as are seen in the auto industry where one station is responsible for putting in the engine, another the tires, another the seats, and so on.

In computers, the same basic logic applies, but rather than producing something physical on an assembly line, it is the workload itself that gets broken down into smaller stages.

Processor pipelining does not help the instruction latency, it only helps the total program throughput. Do you agree or disagree? Provide real-life examples to support your position.

Explanation / Answer

When the basic instruction cycle is divided into a small parts then it is said to a pipeline. It does not process every instruction sequentially, but every instruction is divided into a series of steps so different steps may also be executed parallelly and instructions can be processed simultaniously (concurrently).

Pipeline increaments in throughput by doing more than one operations at the same time, but it does not reduce instruction latency, (the time to complete one instruction ranges from starting to finishing point). But it can increase latency by additional overheads by breaking the computation into different and purely seprate steps. Pipeline increases throughput by using the amount of latency and is used in the CPUs but ignored in real-time systems, where latency is a hard type constraint.

Latency is called the amount time for doing few actions or to present result. Latency is measured in units of time hours, minutes, seconds or clock periods.

Throughput is the count of actions perfomed for results presentation per unit of time. This is measured in units of goods which is being produced (bikes, ships, I/O samples, words) per unit of time.

A company is manufacturing bikes. It spents eight hours to manufacture a bike and the company makes one hundred and twenty bikes per day.

The latency is: 8 hours.

The throughput is: 120 bikes / day

or

we can also write like this 5 bikes / hour.

Real time example

One woman having a througput to produce one baby (strictly not considering twins and triplets, here we are considering only one birth) in 9 months. 9 women are capable to have 9 babies birth in 9 months, (look latancy of 9 months can not be decrease), 9 women can not give birth 1 baby in 1 month).

So, we can say that When pipeline increases throughput by doing more than one operations at the same time, then it does not reduce instruction latency,

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