Assume that the instruction is executed in a single-cycle datapath. The Followin

Question

Assume that the instruction is executed in a single-cycle datapath. The Following instruction was fetched:

0000 0010 0001 0000 1000 0000 0010 0000

Assume the data memory is all zeros and that the processor’s registers have the following values at the beginning of the clock cycle in which the above instruction word is fetched:

r0

r1

r2

r3

r4

r5

r16

r8

r12

r31

0

1

4

2

-2

15

8

6

2

-4

What are the outputs of the sign-extend the shift-2 unit for this instruction word?

What are the values of the ALU control unit’s inputs for this instruction?

For each Mux, show the values of its data output during the execution of this instruction and these register values

For the ALU and the two add units, what are their data input values?

What are the values of all inputs for the “registers” unit?

r0

r1

r2

r3

r4

r5

r16

r8

r12

r31

0

1

4

2

-2

15

8

6

2

-4

Explanation / Answer

First six bits from instruction means opcode. Opcode 000000 means R-instruction. From http://cseweb.ucsd.edu/classes/su06/cse141/misc/single-cyc-control.pdf control signals are as follows:

RegDst = 1 AluSrc=0 MemtoReg=0 RegWrite=1 ... ALUOp1=1 ALUOp0=0 (ALU Control inputs)

R-instruction format from http://www.eng.ucy.ac.cy/mmichael/courses/ECE314/LabsNotes/02/MIPS_Instruction_Coding_With_Hex.pdf

opcode (6) rs (5) rt (5) rd (5) sa (5) function (6)

in this task: rs=100002=1610 means r16, which has value 810=0000 0000 0000 0000 0000 0000 0000 10002 32bit value on the first ALU input;

rt=100002 also means r16 and value 8, thus the same input is on the second ALU input (from the second-mux-from-left output):

0000 0000 0000 0000 0000 0000 0000 10002

function part (last six bits) in this task: 1000002 (on the first input of ALU Control Unit) means

add rd, rs, rt 100000 0x00 0x20 Add (with overflow)

(also from http://www.eng.ucy.ac.cy/mmichael/courses/ECE314/LabsNotes/02/MIPS_Instruction_Coding_With_Hex.pdf)

add means ALU output result is sum 8+8 = 16 = 0000 0000 0000 0000 0000 0000 0001 00002 and the result is in r16 from the fourth mux from left output, too (rd=100002=1610 part of the instruction means write register first mux from the left output )

the third mux from left output is PC+4 (next instruction address)

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