Suppose we have a system with the following properties: .The memory is byte addr
ID: 3704241 • Letter: S
Question
Suppose we have a system with the following properties: .The memory is byte addressable Memory accesses are to 1-byte words (not to 4-byte words) .Addresses are 12 bits wide . The cache is 2-way set associative with a 4-byte block size and 4 sets The contents of the cache are as follows, with all addresses, tags, and values given in hexadecimal notation: Byte 0 40 FE Byte 3 43 DO 47 Set index Valid Byte 2 42 Byte 1 41 97 45 Tag 0 83 46 83 48 49 4A 4B 40 9A ?? 03 0 A. The following diagram shows the format of an address (one bit per box). Indicate (by labeling the diagram) the fields that would be used to determine the following: CO CI CT The cache block offset The cache set index The cache tag 10
Explanation / Answer
According to what i understand in this question is memory is byte addresssable so is cache. but here address is of 12 bits that shows that size of memory is 212 byte (it is byte because of byte addressable), but this doesn't say anything about cache size.
Now we are provided with data that a block in cache can have 4 bytes so block size is 22 and hence for identifying which byte to point after getting block we need 2 bits. Hence cache block offset CO will be at index 0 and 1 of address.
Now it is given that cache is 2 way set associative and it has 4 sets this means there are total of 2*4 = 8 blocks in cache now since in set associative cache we check for the blocks in sets parallely hence we just need to point a set from no. of sets present. So, for identifying set we need 2 bits as we have 4 sets only, Hence cache set index CI will be at index 2 and 3.
Now the remaining index position of address is used for cache tag CT
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