Examine each of the following instructions. Assume that each instruction is inde

Question

Examine each of the following instructions. Assume that each instruction is independent and resets with the initial condition before the next instruction. For each instruction show the entire 32-bit contents of each destination register. Show your work in the Work column if needed (to get partial credits) 1. Register File Mei emory Contents $t0- 0x0000743C Sti= | 0x00007448 St2= | 0x000000B1 St3= | 0x000000C5 $14= | 0XFFFFFFF8 $t50x00000000 $t60xFFFF80AC 0x74500xBCDEF012 0x744c0x9A785630 0x74480xEF05C738 0x74440x95DE50F0 0x74400x23456789 0x743c0xCDEF0123 0x74380x89AB1234 Instruction Result Work $t5 = lb $t5,0xfffc (t1) lw $t5,0x10 ($t0) srl $t5, $t4,7 sra $t5, $t4,5 andi St5, $t4, 0xf7 $t5 = $t5 = slt $t5, $t4, $t6

Explanation / Answer

Answer: 32 – bit contents

Case 1)

lb $t5,-15($t1)

=> $t5 = 0x12

Working :- $t5 = data in address [$t1 - 15] = data in address 0x7439 = 0x12

Case 2)
lhu $t5,0xfff0($t1)

prepared :- $t5 = <- zero-unlimited halfword from address $t1 + 0xfff0 <- 0x7438

=> $t5 = 0x00001234

Case 3)
lw $t5,0x14($t0)

functioning :- $t5 = <- word from address $t0+0x14 = <- 0x7450

=> $t5 = 0xBCDEF012

Case 4)

srl $t5,$t4,5

operational:- $t5 = $t4 >> 5 = 0xFFFFFFF8 >> 5

=> $t5 = 0x07FFFFFF

Case 5)
lui $t5,0x123

functioning :- $t5 = (0x123) << 16

$t5 = 0x01230000

Case 6)
andi $t5,$t4,7

running :- $t5 = $t4 & 7 => 0xFFFFFFF8 & 7

$t5 = 0x0

Case 7)

xor $t5,$t2,$t3

operational :- $t5 = $t2 xor $t3 => 0x000000B1 xor 0x00000006 =>

$t5 = 0x000000B7

slt $t5,$t4,$t1

operational :- $t5 will set if $t4 < $t1 => 0xFFFFFFF8 < 0x00007448

$t5 = 0

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