nstruction on the Zilog z8001 2. The figure below shows the instruction format f

Question

nstruction on the Zilog z8001 2. The figure below shows the instruction format for a 16-bit i processor. The opcode is just 5-bits long so it specifies only 32 instuctions. However, if Operand2 is all zeros the 32 original opcodes specily another set of 32 instructions for a total of 64. We could extend this and allow Operand 2 to specify yet another 32 opcodes had the value 0001. How, if at all, would this limit the processor with regard to use of registers? 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 if operand 2 Mode Opcode w/b Operand 2 Operand 1

Explanation / Answer

In the Given Schema initially we are having 5 bits for OPCode and 4 bits for operand2..

So the total number of operations possible are 2^5 = 32 .. We can increase the this number by increasing the number of bits for the opcode by taking them from any of the other given fields...

Now, We are having 3 bits for operand 1. So, in operand 1 we can put a register with address space as 2^3 = 8

where as in operand2 we could go for 2^4 = 16 bit addressed registers.. So, At any time we can load one 4bit and one 3 bit as of now...

If we give some bits to the OpCode to increase number of operation we might lose the capacity of number of register which we can deal with . Since decrease in 1 bit in operand1/2 may reduce 1/2 of the register capacity. So,There is always tradeoff between them...
I hope u'll be satisfied...Thanks in advance..

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