Computer Architecture Problem #1 (a) What is the difference between virtual addr

Question

Computer Architecture

Problem #1 (a) What is the difference between virtual address and physical address? Can physical address space be large than virtual address space?

(b) What is a virtual memory? Describe at least three key advantages of virtual memory.

(c) What is a page table, what is stored in it, for what purpose it is used, who manages it, and where it is stored? Why the size of page table is an important design criteria in the design of memory management system? Describe some techniques employed to reduce the size of page table.

(d) What is a TLB, what is stored in it, for what purpose it is used, and who manages it? Why the instruction cache and date cache require separate TLBs? What techniques are used to reduce the TLB miss penalty?

(e) Compare and contrast the ideas of virtual memory and virtual machines. How do the goals of each compare? What are the pros and cons of each?

Explanation / Answer

1)Answer:

virtual address :

A virtual address in memory is a pointer or marker for a memory space that an operating system allows a process to use. The virtual address points to a location in primary storage that a process can use independently of other processes.

Address generated by CPU while a program is running is referred as Logical Address. The logical address is virtual as it does not exist physically. Hence, it is also called as Virtual Address. This address is used as a reference to access the physical memory location. The set of all logical addresses generated by a programs perspective is called Logical Address Space.

->Virtual addresses refer to the virtual store viewed by the process.

-> virtual addresses might be the same as physical addresses

->Set of all logical addresses generated by CPU in reference to a program is referred as Logical Address Space.

->The user can view the logical address of a program

->The user uses the logical address to access the physical address

->The Logical Address is generated by the CPU

physical address:

Physical addressing means your program knows the real layout of RAM. It is the address seen by the Memory unit. The physical address space divides into frames and is represented as <frame number, offset>. For example, when you access a variable at a given address, that is where it is stored in the physical RAM chips

->The physical address is a location in a memory unit.

->Set of all physical addresses mapped to the corresponding logical addresses is referred as Physical Address

->The user can never view physical address of program

->The user can not directly access physical address.

->Physical Address is Computed by MMU

b)Answer:

virtual memory:

Virtual memory (VM) is a feature developed for the kernel of an operating system (OS) that simulates additional main memory such as RAM (random access memory) or disc storage. This technique involves the manipulation and management of memory by allowing the loading and execution of larger programs or multiple programs simultaneously. It also allows each program to operate as if it had infinite memory, and is often considered more cost effective than purchasing additional RAM.

Virtual memory permits software to use additional memory by utilizing the hard disc drive (HDD) as temporary storage. Most central processing units (CPUs) provide memory management units (MMUs) that support virtual memory. The MMU supports the “page tables” that are used to transform the “real” and “virtual” addresses located in memory and on the HDD.

An OS that uses virtual memory frees up space by transferring data from the HDD which is not immediately required. When the data is needed, it is copied back to the HDD. When all RAM is being used, VM swaps data to the HDD and then back again. Thus, VM allows a larger total system memory; however, complicated code writing is required.

Advantages:

->The size of program can be more than the size main memory.

->Memory can be used efficiently because a section of program loaded only when it need in CPU.

->Virtual memory allows sharing of code and data, unlimited amounts of multiprogramming.

->We can reduce internal fragmentation using segmented paging and eliminates external fragmentation

•Allows jobs to be allocated in non-contiguous memory locations.

•Memory used more efficiently; more jobs can fit.

Disadvantages:

•Address resolution causes increased overhead.

•Internal fragmentation still exists, though in last page.

•Requires the entire job to be stored in memory location.

•Size of page is crucial (not too small, not too large).

c)Answer:

Page table:

A page table is the data structure used by a virtual memory system in a computer operating system to store the mapping between virtual addresses and physical addresses. Virtual addresses are used by the program executed by the accessing process, while physical addresses are used by the hardware, or more specifically, by the RAM subsystem.

d)Answer:

TLB:

A translation lookaside buffer (TLB) is a memory cache that stores recent translations of virtual memory to physical addresses for faster retrieval.

When a virtual memory address is referenced by a program, the search starts in the CPU. First, instruction caches are checked. If the required memory is not in these very fast caches, the system has to look up the memory’s physical address. At this point, TLB is checked for a quick reference to the location in physical memory.

When an address is searched in the TLB and not found, the physical memory must be searched with a memory page crawl operation. As virtual memory addresses are translated, values referenced are added to TLB. When a value can be retrieved from TLB, speed is enhanced because the memory address is stored in the TLB on processor. Most processors include TLBs to increase the speed of virtual memory operations through the inherent latency-reducing proximity as well as the high-running frequencies of current CPU’s.

TLBs also add the support required for multi-user computers to keep memory separate, by having a user and a supervisor mode as well as using permissions on read and write bits to enable sharing.

TLBs can suffer performance issues from multitasking and code errors. This performance degradation is called a cache thrash. Cache thrash is caused by an ongoing computer activity that fails to progress due to excessive use of resources or conflicts in the caching system

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