Just need help figuring this out THANKS! gtbus to use a smaller cache. [15] A pr

Question

Just need help figuring this out

THANKS!

gtbus to use a smaller cache. [15] A program is running on a computer with a four entry fully associa- tive (micro) translation lookaside buffer (TLB) (Figure B.33) B 13 The following is a trace of virtual page numbers accessed by a program. For each access indicate whether it produces a TLB hit/miss and, if it accesses the page table, whether it produces a page hit or fault. Put an X under the page table column if it is not accessed (Figures B.34 and B.35).

Explanation / Answer

*Note: Whenever a process is created, paging is applied on the process and page table is created. First of all, page is searched in the TLB. if it is in TLB and valid bit= 1, then corresponding frame(or, physical page #) is accessed from physical memory (or, main memory). If it is not present in TLB or valid bit = 0, then It is searched in page table, If it is found in the page table, then access frame corresponding to the page and check whether It is present in the main memory or not. If it is not available, then page fault occurs.

*Note:- If a page is found in TLB, then there need not to check in the page table, because the page is definitely present in main memory. So, that is represented by " - " in page table column.

virtual page accessed TLB(hit or miss) Page table (hit or fault) 1 miss fault 5 hit - 9 miss fault 14 miss fault 10 hit - 6 miss hit 15 hit - 12 miss hit 7 miss hit 2 miss fault

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