You are investigating the possible benefits of a way-predicting L1 cache. Assume

Question

You are investigating the possible benefits of a way-predicting L1 cache. Assume that a 64 KB four-way set associative single banked L1 data cache is the cycle time limiter in a system. As an alternative cache organization you are considering a way-predicted cache modeled as a 64 KB direct-mapped cache with 80% accuracy. Unless stated otherwise, assume that a mispredicted way access that hits in the cache takes one more cycle. Assume that the miss rates and miss penalties are as follows: Misses per instruction: 0.00664 for direct-mapped and 0.000987 for four-way set associative. Cache miss penalty is 10 ns (for both direct-mapped and set-associative) a. What is the average memory access time of the current cache (in cycles) versus the waypredicted cache? b. If all other components could operate with the faster way-predicted cache cycle time (including the main memory), what would be the impact on performance from using the way-predicted cache? c. Way-predicted caches have usually been used only for instruction caches that feed an instruction queue or buffer. Imagine that you want to try out way prediction on a data cache. Assume that you have 80% prediction accuracy and that subsequent operations (e.g., data cache access of other instructions, dependent operations) are issued assuming a correct way prediction. Thus, a way misprediction necessitates a pipe flush and replay trap, which requires 15 cycles. Is the change in average memory access time per load instruction with data cache way prediction positive or negative, and how much is it?

Explanation / Answer

a) The average memory access time of the current cache is 0.0056 × 20 + (1 –0.0056) = 1.11 cycles. The Average Memory Access Time (AMAT) of the way-predicted cache has three components: miss, hit with way prediction correct, and hit with way prediction mispredict: 0.0056 × 20 + (0.85 × 1 + (1– 0.85) × 2) × (1 – 0.0056) = 1.26.

b) The access time of the 32 KB 2-way cache is 0.91 ns, while the 16 KB directmapped cache can be accessed in 0.56 ns. This provides 0.91/0.56 = 1.63, or 63% faster execution.

c) With a 1-cycle way misprediction penalty, AMAT is 1.26—as per part (a), but with a 15-cycle

misprediction penalty, the AMAT becomes 0.0056 × 20 + (0.85 × 1 + (1 – 0.85) × 15) × (1 – 0.0056) = 3.19, for an increase of 3.19 –1.26 = 1.93!

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