Consider the following instruction: or $tl, $t2, $t3 What are the values of cont

Question

Consider the following instruction: or $tl, $t2, $t3 What are the values of control signals generated by the control in the above figure for the given instruction? | Which components perform a function for this instruction? Which components produce no outputs for this instruction? The basic single-cycle MIPS processor in the above figure only implements some instructions. We want to add a new instruction (andi, $tl, $t2, imm-value) to an existing ISA. Which existing components (if any) can be used for the new instruction? Which new components (if any) do we need for this instruction? What new signals do we need (if any) from the control unit to support this instruction?

Explanation / Answer

Please find answer to the first full question below:-

Values of signals are plotted in table and rest questions are answered:-

1) What are the values of control signals generated by the control for the above figure for the given instruction?

Below is the table for control signals:-

Opcode

ExtSel

BSource

OpSel

MEM

Write

REG

Write

Write source

REG

Destination

PC Source

ALU

*

REG

Function

No

yes

ALU $t1

$T1

PC+4

Where

ExtSel is extend sign, which is not present

BSource is the bottom MUX in the figure and is used to determine if an immediate operand or a register is passed to the ALU.

OpSel is ALU command

MEM Write is no, as no memory reference is used.

REG Write is true, we are writing back to register $T1

Write Source is will set to use output from ALU as data

REG Destination is $T1

PC Source is PC + 4 since no jumps occur

2) Which perform a useful function for this instruction?

        Below are the components which perform the functions:-

        a) Program Counter:- The instruction address is fetched from the program counter

        b) Instruction memory:-The operands are fetched from the instruction memory

        c) Registers:-The result is written to registers

        d) ALU:-ALU is used to perform the operation

3) Which components produce no outputs for this instruction?

     a) Data Memory:-It produces no output for OR instruction

     b) Branch Add:-It produces no output for OR instruction and is used by branch instructions                 

                                  to find the next instruction address.

        

Opcode

ExtSel

BSource

OpSel

MEM

Write

REG

Write

Write source

REG

Destination

PC Source

ALU

*

REG

Function

No

yes

ALU $t1

$T1

PC+4

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