In this exercise, we examine how data dependences affect execution in the basic
ID: 3825289 • Letter: I
Question
In this exercise, we examine how data dependences affect execution in the basic 5-stage pipeline described in Section 4.5. Problems in this exercise refer to the following sequence of instructions: ADD R1, R2, R3 SUB R2, R1, R2 XOR R1, R1, R2 Also, assume the following cycle times for each of the options related to forwarding. Without forwarding, there is no additional forwarding paths. Full forwarding means the pipeline has two forwarding paths: from EX/MEM to EX (also called ALU-ALU forwarding), and from MEM/WB to EX. Indicate dependences and their type (RAW, WAR, WAW, RAR). Assume that there is no forwarding in this pipelined processor. Please add nop instructions to ensure correctness. Assume that there is full forwarding. Please add nop instructions to ensure correctness. What is the total execution time (in wall clock time) of this instruction sequence without forwarding and with full forwarding? What is the speedup achieved by adding full forwarding to a pipeline that had no forwarding?Explanation / Answer
INSTRUCTIONS:
I1: ADD R1, R2, R3
I2: SUB R2, R1, R2
I3: XOR R1, R1, R2
ANSWERS:
2.1.
2.2.
Time Sequence Pipeline Diagram for No Forwarding:
T0
T1
T2
T3
T4
T5
T6
T7
T8
I1
IF
ID
EX
MEM
WB
I2
IF
ID
STALL
EX
MEM
WB
I3
IF
ID
STALL
STALL
EX
MEM
WB
Total number of cycles = 9
Total number of stalls = 3
Addition of NOP instruction to maintain correctness:
I1: ADD R1, R2, R3
I2: NOP
I3: SUB R2, R1, R2
I4: NOP
I4: NOP
I5: XOR R1, R1, R2
2.3.
Time Sequence Pipeline Diagram for Full Forwarding:
T0
T1
T2
T3
T4
T5
T6
I1
IF
ID
EX
MEM
WB
I2
IF
ID
EX
MEM
WB
I3
IF
ID
EX
MEM
WB
Total number of cycles = 6
Total number of stalls = 0
Addition of NOP is not required here.
2.4.
Total Execution time (Without Forwarding) = 250 * 9 ps = 2250 ps
Total Execution time (With Forwarding) = 290 * 6 ps = 1740 ps
T0
T1
T2
T3
T4
T5
T6
T7
T8
I1
IF
ID
EX
MEM
WB
I2
IF
ID
STALL
EX
MEM
WB
I3
IF
ID
STALL
STALL
EX
MEM
WB
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