For questions 1 through 3, use the following list of 32 bit memory address refer

Question

For questions 1 through 3, use the following list of 32 bit memory address references, given as byte addresses. Note that you will need to convert them to binary: 3, 180, 43, 2, 191, 88, 190, 14, 181, 44, 186, 253.
2) Assume a direct-mapped cache with 4 4-byte blocks. For each reference, list the binary address, the tag, the index, and if the reference is a hit or a miss, assuming the cache is initially empty.
For questions 1 through 3, use the following list of 32 bit memory address references, given as byte addresses. Note that you will need to convert them to binary: 3, 180, 43, 2, 191, 88, 190, 14, 181, 44, 186, 253.
2) Assume a direct-mapped cache with 4 4-byte blocks. For each reference, list the binary address, the tag, the index, and if the reference is a hit or a miss, assuming the cache is initially empty.

2) Assume a direct-mapped cache with 4 4-byte blocks. For each reference, list the binary address, the tag, the index, and if the reference is a hit or a miss, assuming the cache is initially empty.

Explanation / Answer

Word address mean a block size of 4-bytes to hold the word.since we have 16 one word blocks (4 4-byte blocks),we need 4 bits for the index (through since we are word aligned we could in theory ignore the 2 low bits). So the tag needs to be 32-4 = 28bits, from the high end of the address.

Reference Address Tag Index hit/miss 3 00000011 0000 0011 miss 180 10110100 0010 0000 miss 43 00101011 0010 0011 miss 2 00000010 0000 0010 miss 191 10111111 1011 1111 miss 88 01011000 0101 1000 miss 190 10111110 1011 1110 miss 14 00001110 0000 1110 miss 181 10101101 1010 1101 miss 44 00101100 0010 1100 miss 186 10111010 1011 1010 miss 253 11111101 1111 1101 miss

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