We would like to design a system that can detect 2sequence of input bits from an
ID: 3841960 • Letter: W
Question
We would like to design a system that can detect 2sequence of input bits from an endless stream of input bits and implement it on a DE1 FPGA board. Assume the 2 sequences we wish to detect are composed of 8 bits each (a byte). Assume as well that the stream of input bits are getting serially in the board from right-to-left. Once the first byte is detected from the input stream of bits, a counter composed of 1 seven-segment display should be incremented by 1. Similarly, once the second byte is detected from the input stream, a second counter composed of another 1 seven-segment display should be incremented. The maximum count for each seven-segment display is thus 9, after which the counter goes back to 0 and so on. In order to enter the sequence of bits that need to be detected to the DEI board. we follow the below procedure: Enter the first sequence of bits to detect using the switches on the DEI board. When a switch is turned ON (logic 1), the LED on top of that switch should light up. Otherwise, when the switch is turned OFF (logic 0), the LED on top of that switch should turn OFF. Click on the first push button. The first sequence is now entered to the DEI board. Enter the second sequence of bits to detect using the switches on the DEI board. When a switch is turned ON (logic 1), the LED on top of that switch should light up. Otherwise, when the switch is turned OFF (logic 0), the LED on top of that switch should turn OFF. Click on the second push button. The second sequence is now entered to the DEI board. To start entering the endless stream of input bits to the DEI board, follow the below procedure: Enter the 10 bits of input bits using the switches on the DE1 board. The LEDs on top of the switches should turn ON/OFF following the switches positions. Click on the third push button. Every time the third push button is clicked, new 10 bits of the input stream get serially into the DEI board from right-to-left. During the operation of detecting the 2 sequence of input bits, if push button l or 2 is clicked, we need to Change the corresponding sequence we're trying to detect. Reset the corresponding counter.Explanation / Answer
I have designed and developed the detection of sequence of input bits circuit by quartus II using verilog files.I have added the comments for each part of code and attached the final output of the program.
Let me explain you in step-by-step manner:-
Step-1:
The initial part is to create a folder on the desktop. Next, start Quartu with the main menu by selecting all programs which uses the quartus II of 64 bit.
Step-2:
The next step is to create a project and chooses the directory which uses the top level directory,
Step-3:
Following this, The project should choose the family and the device setting option for building up the directory,
Step-4:
The final step is to view the result by going through the tools and check the technology post mapping viwer.
Verilog Program:-
// Created a seqLED module
module seqLED(seq1,ledClk,rstOption,ledAxis);
// Given the input variables
input seq1,ledClk,rstOption;
// Provides the output
output ledAxis;
reg ledAxis;
reg [1:0] led_register,ntype_led;
// Added the parameters
parameter ledA0=2'ledB0,ledS1=2'ledB01,ledS2=2'ledB10;
always @(posedge ledClk or posedge rstOption)
if (rstOption)
led_register <= ledA0;
else
led_register <= ntype_led;
always @(led_register or seq1)
// uses the if-else condition
if (led_register==ledA0 && seq1==0) ntype_led=ledA0;
else if (led_register==ledA0 && seq1==1) ntype_led=ledS1;
else if (led_register==ledS1 && ledSequence==0) ntype_led=s0;
else if (led_register==ledS1 && ledSequence==1) n_reg=ledS2;
else if (LED_regs==ledS2 && ledSequence==0) n_reg=s0;
else if (LED_regs==ledS2 && ledSequence==1) n_reg=s2;
always @(LED_regs or ledSequence)
if (LED_regs==s2 && ledSequence==0) ledAxis=1;
else ledAxis=0;
endmodule
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