1. Extending the range of numbers that can be expressed by increasing the bit le
ID: 3842293 • Letter: 1
Question
1. Extending the range of numbers that can be expressed by increasing the bit length is referred to as
2. Occurs when an arithmetic operation results in an absolute value greater than can be expressed with an exponent of 128
3. Is when the result is put back into the floating-point format and the extra bits must be eliminated in such a way as to produce a result that is close to the exact result.
4. To ___ a signal is to cause a signal line to make a transition from its logically false (0) state to its logically true (1) state.
5. To subtract one number from another, take the two's complement of the subtrahend and add it to the minuend” is the ____ rule
6. In a ____ number system, each number is represented by a string of digits in which each digit position i has an associated weight ri , where r is the radix of the number system.
7. _____ is the ability to issue more than one instruction in every processor clock cycle Multiple Instruction Issue.
Explanation / Answer
1. Extending the range of numbers that can be expressed by increasing the bit length is referred to as Sign Extension
2. Overflow Occurs when an arithmetic operation results in an absolute value greater than can be expressed with an exponent of 128
3. Rounding off Is when the result is put back into the floating-point format and the extra bits must be eliminated in such a way as to produce a result that is close to the exact result.
4. To assert a signal is to cause a signal line to make a transition from its logically false (0) state to its logically true (1) state.
5. To subtract one number from another, take the two's complement of the subtrahend and add it to the minuend” is the Subtraction rule
6. In a Positional number system, each number is represented by a string of digits in which each digit position i has an associated weight ri , where r is the radix of the number system.
7. instruction-level parallelism is the ability to issue more than one instruction in every processor clock cycle Multiple Instruction Issue.
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