Assume the following information about a 2-level memory hierarchy system. Memory
ID: 3846301 • Letter: A
Question
Assume the following information about a 2-level memory hierarchy system.
Memory is byte addressable.
Memory capacity is 4 GB (G=2^30).
Cache capacity is 64 KB (K=2^10).
Block offset size is 8 bits.
Assuming that the CPU has generated the physical address X = (2293936063)10, answer the following questions.
a. If direct mapped is used, where will the block containing address X reside in cache? In other words, what is the cache address for the block containing address X?
b. If 2-way set associative is used, how many blocks are in the cache?
c. What is the memory physical address size? In other words, how many bits are in each physical address?
d. If direct mapped is used, how many segments are in the memory?
e. If direct mapped is used, what is the size of each segment in bytes?
f. If 2-way set associative is used, what is the size of each segment in bytes?
g. What is the block offset value (not size) for this physical address (i.e. X)? h. If direct mapped is used, what is the index size (not value)?
i. If 2-way set associative is used, what is the index size (not value)?
Explanation / Answer
Given
Memory capacity is 4 GB (G=2^30).
Cache capacity is 64 KB (K=2^10).
Block offset size is 8 bits.
Hence total number of blocks is = 28 = 256.
a.
Given physical address X = (2293936063)10
physical address in binary 1000 1000 1011 1010 1010 1111 1011 1111.
If we use direct mapped cache the address will be as follow
Block size is = Cache size / Total Number of blocks
= 64 KB / 256 = 1 KB / 4 = 256 B
Hence Block size is = 256 B.
Hence word offset is = 8 bits
We know that in direct mapping Address is = TAG + block offset + word offset
32 bits = TAG + 8 bits + 8 bits
TAG = 16 bits.
From the address 1000100010111010 10101111 10111111 (TAG block offset word offset).
Hence the block in which the address reside in the main memory is 10101111(175th block).
Now we know that in direct mapping cache kth block of Main Memory will be placed in K mod N
of cache Memory , where N is number of cache blocks.
Here 175th block is placed in 175 mod 256 = 175.
b.
If we use 2 way set associative then Number of sets is = Total number of blocks / 2 = 256/2 =128.
c.
32 bits.
d.
we know that block size is = 256B
Hence number of segment is = 4 GB / 256B = 224
e.
256 B
f.
256B / 2 = 128B.
g.
From the address 1000100010111010 10101111 10111111.
Block offset value = 10101111.
index size = word offset = 8 bits.
f.
Index size is = 7 bits
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