Problem: On an ARM processor using big endian format, given the following memory
ID: 3871477 • Letter: P
Question
Problem: On an ARM processor using big endian format, given the following memory map and [R1] = 0xA10E0C2D, [R2] = 0x00000060, [R3] = 0x00000002, [R4] = 0x0000000C, predict [R1] and [R2] and draw the updated memory map after an ARM data transfer instruction is executed in EACH case. (hint: (1) in this map, each memory location is a word long and occupies 4 bytes; also you only need to draw the section of the memory including the changed word and its address; (2) these instructions are NOT executed one after the other one; instead, each instruction starts with the initial conditions given in the statement.)
0x6C [0x78092A7B]
0x68 [0x56AB8CEF]
0x64 [0x3490AB02]
0x60 [0x902E8C9A]
(1) LDRH R1, [R2, R4]
(2) STRB R1, [R2]
Explanation / Answer
Given that [R1] = 0xA10E0C2D, [R2] = 0x00000060, [R3] = 0x00000002, [R4] = 0x000000
Given that the processor executes in Big Endian format (MSB is stored in the lowest address location), Therefore the address location along with the value is given as follows
0x60 = 0x90
0x61 = 0x2E
0x62 = 0x8C
0x63 = 0x9A
0x64 = 0x34
0x65 = 0x90
0x66 = 0xAB
0x67 = 0x02
0x68 = 0x56
0x69 = 0xAB
0x6A = 0x8C
0x6B = 0xEF
0x6C = 0x78
0x6D = 0x09
0x6E = 0x2A
0x6F = 0x7B
1. LDRH R1, [R2, R4]
R1 <-- [0x60+00] = R1 <---[0x60] since the halfword(16bits) is transfered to R1
R1 = 0x902E
2. STRB R1,[R2]
Store Byte(STRB) Value from R1 is transferrd to the address location which is R2
We know that R1 = 0xA10E0C2D since it big endian MSB is transferred first to the address location 0x60
After this instruction
0x60 = 0xA1
0x61 = 0x2E
0x62 = 0x8C
0x63 = 0x9A
0x64 = 0x34
0x65 = 0x90
0x66 = 0xAB
0x67 = 0x02
0x68 = 0x56
0x69 = 0xAB
0x6A = 0x8C
0x6B = 0xEF
0x6C = 0x78
0x6D = 0x09
0x6E = 0x2A
0x6F = 0x7B
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