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Using Logisim and build th F(n) = n × 3 + 6 circuit in simulation How many outpu

ID: 3889360 • Letter: U

Question

Using Logisim and build th F(n) = n × 3 + 6 circuit in simulation

         How many output bits will you nd to rprsnt f(n), if n can b any 2-bit numbr?

1.Draw th truth tabl that rprsnts th bhavior of this circuit — show all possibl inputs and corrct outputs for ach input.

Analyz th tabl and dtrmin th combinational logic that guids ach output bit. You should dvlop an algbraic xprssion for ach output bit.

Diagram th combinational circuit with a complt logic dsign diagram.

Opn Logisim and opn your gnric.circ fil.

Now, us Sav As and sav th circuit as initial_labs.circ

Look at th top of th libraris tr and right click on th main circuit and choos Rnam Circuit.

Rnam th main circuit - "x3plus6"

Add th following I/O:

2 1-bit inputs facing ast ach with appropriat labl

4 1-bit outputs facing wst ach with appropriat labl

Th circuit must b intractiv. Toggling th input pins with th Pok Tool should caus th output valu (rprsntd by th four output pins) to updat instantly and corrctly.

Th circuit must b asthtically plasing. Arrang inputs, outputs, and othr dvics so that wirs flow in paralll and rmain untangld. On should b abl to follow th flow of th logic by th flow of th wirs.

Basic convntions of an asthtically plasing circuit:

Lft to Right flow. Inputs on th lft, outputs on th right, and a gnral lft-to-right logical progrssion.

Organization: How th circuit is laid out should rflct and guid how on is supposd to think about th circuit.

Explanation / Answer

Step1. Determine the number of flip-flop stages req

uired. In this case it is 3.

Step2. Flip-flop outputs Q

2

Q

1

Q

0

are determined by the specifications. Present stat

e

and next state tables are constructed. The present

state-next state table (quick and

full) is shown below. Make sure that the counter co

unts in the following order:

001

011

010

110

111

101

Quick table:

Full table:

Present-state

Next-state

Q

2

Q

1

Q

0

Q

2

+

Q

1

+

Q

0

+

0

0

1

0

1

1

0

1

1

0

1

0

0

1

0

1

1

0

1

1

0

1

1

1

1

1

1

1

0

1

1

0

1

0

0

1

On Karnaugh map, put x for the states

that does not exist in this table

Step 3. Find state transition relationships for eac

h pair of present-state-next-state

columns, using the state change table for the chose

n flip-flop.

Step 4. Use the complete present state as input to

truth tables whose outputs are

state transition values corresponding to each flip-

flop input.

Step 5. With map or Boolean algebra methods find ex

pressions (excitation

equations) for each flip-flop input from the truth

tables of step 4.

Step 6. Form system outputs from combinations of th

e flip-flop outputs.

Step 7. Realize the excitation expressions as combi

national logic drives for the

flip-flop inputs.

Step 8. You can check your design by constructing a

timing diagram.

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