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Problem 4 (19 points) A. (9 pts) You decide that instead of having 32, 32-bit re

ID: 3910430 • Letter: P

Question

Problem 4 (19 points) A. (9 pts) You decide that instead of having 32, 32-bit registers, you would like to build a machine with 16, 64-bit registers. You also need to make a modified MIPS instruction set for this architecture. (4 pts) In the box below, specify the size of the fields to best utilize the 32-bit instructions on this new architecture. Do not modify the size of the opcode. 1. opcode rs rt rd shamt funct opcode rs rt imm 2. (1 pt) How many different R-type instructions can we now have if "funct" is the only variable we need to change to differentiate between different R-type instruction. 3. (2 pts) If PC 0x061C, what is the largest address that we can branch to? 4. (2 pts) Translate the following machine code into MIPS using your new field sizes. Use register numbers instead of register names, since we'd have to think of a new convention for the names. OxAE9FFFF8

Explanation / Answer

Answer is as follows :

1)

For box a)

Opcode = 6 bits

rs = 5 bits (source register 1)

rt = 5 bits (source register 2)

rd = 5 bits (destination register)

shamt = 5 bits

funct = 6 bits.

So total are 6+5+5+5+5+6 = 32 bits

for box b)

Opcode = 6 bits

rs = 5 bits (source register )

rt = 5 bits (destination register)

imm = 16 bits (data)

So total are = 6+5+5+16 = 32 bits

2) As we know that funct is of 6 bits

So there are 26 instructions if we only modify funct and can't modify opcode

So 26 = 64 instructions.

3) Now the PC = 0x061C i.e. 16 bits.

So the largest 16 bits value is FFFFF.

So the largest address branch can do is 0xFFFF.

4) We have 0xAE9FFFF9

which is equal to 1010 1110 1001 1111 1111 1111 1111 1001 in binary

So we know that first 6 MSB are for opcode so opcode is 101011 i.e. opcode for sw instruction i..e. store word

next bits are used for source register i.e. 10100 i.e. equal to $20 in decimal and in mips register it can writtten in $s4.

next 5 bits are used for destination register i.e. 11111 i.e. equal to $31 in decimal and in mips it is written as $ra.

next 16 bits are set for offset i.e.1111 1111 1111 1001 i.e. 65529 in decimal.

So the instruction can be written as

sw $ra,65529($s4)

if there is any query please ask in comments....

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