A memory system has 3 caches in its memory heirarchy, L1, L2, and L3: L1 hit rat

Question

A memory system has 3 caches in its memory heirarchy, L1, L2, and L3:

L1 hit rate = 94%
L1 access time = 1

L2 hit rate = 97%
L2 access time = 6

L3 hit rate = 98%
L3 access time = 12

Main Memory Acess Time = 80
The access times are in clock cyles.
What is the average memory access time for a memory reference?

I know the following formula for a two tiered cache system: tavg = (h1)(t1) + (1-h2) * [(h2)(t2) + (1-h2)(tmain)]. I have just had several discrepencies when applying the same concept of tavg = (hit time) + (miss time ) to systems of more than 2 caches. Any input would be appreciated and ranked!

Explanation / Answer

Following is the formula for a three tiered cache system.

tavg = (h1)*(t1) + (1-h2) * [(h2)*(t2) + (1-h2)*(tmain)] + (1-h3) * [(h3)*(t3) + (1-h3)*(tmain)]

When accessing some memory level you ALWAYS access this level, not with probability.

ACCESS L1, if you MISS (some probability), you go to L2. On L2 you again make an ACCESS, and if you MISS (with some probability), you move to L3)...

tavg = (h1)*(t1) + (1-h2) * [(h2)*(t2) + (1-h2)*(tmain)] + (1-h3) * [(h3)*(t3) + (1-h3)*(tmain)]

= 0.94*1 + 0.03*( 0.97*6 + 0.03*80 ) + 0.02*( 0.98*12 + 0.03*80 )

=1.4698 answer

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