Model a 32-bit ALU that can perform the following operations in behavioral Veril

Question

Model a 32-bit ALU that can perform the following operations in behavioral Verilog:

Control Line Operation              
0                      Addition                       
1                      Subtraction   
   
This module has three inputs: two 32-bit signed numbers represented in 2's complement format (A & B) and a 1-bit control (CTRL). It produces a 32-bit result (R). Verify the functionality of the model. Use the following test vectors for the simulation results that you submit:

                 Addition & subtraction

                 A = FFFFFF00   B = FFFFFFFF
                 A = FFFFFFFF   B = 000F00FF
                 A = 98998998   B = 51416270
                 A = AAAAAAAA   B = EFABCD12
                 A = FFFFFFFF   B = 00000001
                 A = FFFFFFFF   B = FFFFFFFF
   A = 80000000   B = FFFFFFFF

Explanation / Answer

module add_sub (A,B,CTRL,R);

input [31:0] A,B;

input CTRL;

output reg [31:0] R;

reg [31:0] B_N,A_N;

reg S_A,S_B;

always @(A,B,CTRL)

begin

if (A[31])

A_N=~A+1;

else

A_N=A;

if (B[31])

B_N=~B+1;

else

B_N=B;

if (!CTRL)

R=A_N+B_N;

else

R=A_N+ (~(B_N)+1);

end

endmodule

module test_as;

reg [31:0] A,B;

reg CTRL;

wire [31:0] R;

add_sub a1 (A,B,CTRL,R);

initial

begin

A=32'hffffff00;

B=32'hffffffff;

CTRL=1'b0;

#10;

CTRL=1'b1;

#20;

A=32'h98998998;

B=32'h51416270;

CTRL=1'b0;

#10;

CTRL=1'b1;

#20;

A=32'hAAAAAAAA;

B=32'hEFABCD12;

CTRL=1'b0;

#10;

CTRL=1'b1;

#20;

A=32'hffffffff;

B=32'h00000001;

CTRL=1'b0;

#10;

CTRL=1'b1;

#20;

A=32'hffffffff;

B=32'hffffffff;

CTRL=1'b0;

#10;

CTRL=1'b1;

#20;

A=32'h80000000;

B=32'hffffffff;

CTRL=1'b0;

#10;

CTRL=1'b1;

#10 $finish;

end

initial

begin

$monitor("A=%h b=%h CTRL=%b R=%h",A,B,CTRL,R);

end

endmodule

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