Model a 32-bit ALU that can perform the following operations in behavioral Veril
ID: 3564096 • Letter: M
Question
Model a 32-bit ALU that can perform the following operations in behavioral Verilog:
Control Lines Operation
00 Addition
01 Subtract
10 Bitwise OR
11 Bitwise AND
This module has three inputs: two 32-bit signed numbers represented in 2'c complement format (A & B) and a 2-bit control (CTRL). It produces four outputs: a 32-bit result (R), an overflow flag (O), a sign flag (N), and a Zero flag (Z). The result should be in 2's complement format as well. The overflow bit is set when the result of addition or subtraction is out of range. The sign flag is set when the result is negative. The zero flag is set when the result is zero.
Explanation / Answer
DO RATE if satisfied
`timescale 1ns / 1ps
module ALU32bit(
input [31:0] A,
input [31:0] B,
input [1:0] CTRL,
output [31:0] R,
output O,
output N,
output Z
);
wire Carry;
assign {Carry, R} = CTRL==2'b00 ? A+B :
CTRL==2'b01 ? A-B :
CTRL==2'b10 ? A|B : A&B;
assign Z = (R==32'b0);
assign N = R[31];
assign O = (R[31] ^ Carry) & (CTRL ==2'b00);
endmodule
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