Question are ture or false. I\'m having trouble how to read the tables thus find
ID: 3534431 • Letter: Q
Question
Question are ture or false. I'm having trouble how to read the tables thus finding the questions hard. If somone can show how they got T or F would be awesome.
You have a virtual memory system with a two-entry TLB, a 2-way set associative cache and a page table for a process P. Assume cache blocks of 8 bytes and page size of 16 bytes. In the system below, main memory is divided up into blocks, where each block is represented by a letter. Two blocks equals one frame.
1) Virtual address page 5, offset 4 results in a TLB miss and a page table hit.
2) Virtual address page 0, offset 3 results in a page fault.
3) Virtual address page 0 offset 0 is a TLB hit and a cache miss.
4) Physical address Block 6 results in a cache miss.
5) Virtual address page 7, offset 1 results in a TLB hit.
Page Block 013 Set 0 ta Set 1 TLB Cache Frame | Valid Frame Block Virtual Menory Page Table Main Memory For Process P 0123456 8901 12 13 14 s ABCDE-GETTRLMNOP age 0 1 2 3 4 5 6 7 022 4S67 ory CDIT-GRAB CD C Set Set | al-1-1011000 31 IExplanation / Answer
1.True
2.False
3.True
4.False
5.True
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