1. Pipeline Basics [20 marks] Consider the f | d|xIm| w pipeline, where the \'l\

Question

1. Pipeline Basics [20 marks] Consider the f | d|xIm| w pipeline, where the 'l' are the pipeline latches. Latch names are derived from the box names on either side 11 x-box> f/d ITL a) [10 marks] To which latch does each box write and why is this a necessary choice? From which latch does each box read? Is there precisely one latch that can be read by a given box? Explain briefly. Next, consider the space-time diagram for the code below, and consider the flow of value 'rl'. add rl, r2,r3f dxn w add r4, rl,r5 add r6, rl,r7 For each instruction, from which latch does the x-box read the value 'r1'? b) [10 marks] Focus on the first instruction alame. i) What data does the f-box send to the d-box? ii) What control plus data does the d-box send to the x-box? iii) Do either the mbox or the w-box receive either control or data fr the d-box? Explain.

Explanation / Answer

a)
f/d latch writes to the d-box, f box fetches the next instruction from the program counter and sends it to the f/d latch, which then writes it to the d-box
d/x latch writes to the x-box, d box decodes the fetched instruction, and sends it to d/x latch, which then writes it to the x-box
x/m latch writes to the m-box, x box executes the instruction and sends the result to x/m latch, which then writes it to the m-box
m/w latch writes to the w-box, m box gets the result and sends it to m/w latch, which writes it to the w-box

with the above given explanation, we can conclude that:

f/d latch reads from the f-box
d/x latch reads from the d-box
x/m latch reads from the x-box
m/w latch reads from the m-box

all the boxes read from the latch to its left(the latch just before the box), but in few cases in case of data hazards, a box can read from some other latches, from where a data depending on the previous instruction can be fetched.

Eg. x3 = x1 + x2
x4 = x5 + x3

Pipeline can be written as:

Instuction 1: x3 = x1 + x2 : f | d | x | m | w
Instuction 2: x4 = x5 + x3 : f | d | x | m | w

in the second instruction, we need x3, but x3 is calculated only after the first instruction is executed and the result is properly written to the desired register(i.e. the w-box of the first instruction), Thus in such cases there is a delay in pipeline, in such cases, the result is read from the x-box or x/m latch of the previous instruction in the pipeline, i.e. after the previous result is calculated, the same result is sent to the x-box of the next instruction. Usually x-box reads from d/x latch in the pipeline, but in this case, it is reading from the x/m latch of the previous instruction.

add r1,r2,r3 f d x m w
add r4,r1,r5 f d x m w
add r6,r1,r7 f d x m w

first instruction : x-box reads from d/x latch

second instruction : x-box reads from the x/m latch of the previous instruction. the result is not yet stored in the register r1, as w-box of 1st instruction is not yet executed, until x-box of 2nd instruction is going to be executed. To overcome the delay, it is read from the x/m latch(just after the result is properly calculated)

third instruction : x-box-reads from the m/w latch. This instruction also needs register r1, result of 1st instruction, which is not yet stored, but it can be read from m/w latch.

b) Considering the 1st instruction:

i) f-box fetches the instruction(add r1,r2,r3) and sends it to the d-box

ii) the data( two registers r2,r3 ) and control ( addition [+]) is sent to the x-box

iii) m-box, w-box receives the result and the register r3 from the d-box, as this is where the result is to be stored.

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