Write a rogram using timers, counters, and shift register bit (SR) functions usi

Question

Write a rogram using timers, counters, and shift register bit (SR) functions using ladder logic of the DL 06 manual.

The instructions are:

1. Generate a shift bit function (SR) to make LED's 1 through 6 lit in sequential order one second apart from one another.

2. Utilize a timer to ause the process for 5 seconds once LEDs 1 through 6 are all lit.

3. Generate another shift bit function (SR) to make LED's 1 through 6 turn off in sequential order one second apart from one another.

4. Use another timer to pause the process for 5 seconds once LED's 1 through are all turned off.

5. Limi steps 1 thru 4 to two cycles. (all on, all off, all on, all off)

6. Toggle switch 1 is tu be used as counter, timer, and process resets.

PLEASE SHOW IN DETAIL

Explanation / Answer

This sequential device loads the data present on its inputs and then moves or “shifts” it to its output once every clock cycle, hence the name Shift Register.

A shift register basically consists of several single bit “D-Type Data Latches”, one for each data bit, either a logic “0” or a “1”, connected together in a serial type daisy-chain arrangement so that the output from one data latch becomes the input of the next latch and so on.

Data bits may be fed in or out of a shift register serially, that is one after the other from either the left or the right direction, or all together at the same time in a parallel configuration.

The number of individual data latches required to make up a single Shift Register device is usually determined by the number of bits to be stored with the most common being 8-bits (one byte) wide constructed from eight individual data latches.

Shift Registers are used for data storage or for the movement of data and are therefore commonly used inside calculators or computers to store data such as two binary numbers before they are added together, or to convert the data from either a serial to parallel or parallel to serial format. The individual data latches that make up a single shift register are all driven by a common clock ( Clk ) signal making them synchronous devices.

Shift register IC’s are generally provided with a clear or reset connection so that they can be “SET” or “RESET” as required. Generally, shift registers operate in one of four different modes with the basic movement of data through a shift register being:

The effect of data movement from left to right through a shift register can be presented graphically as:

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