What causes a register to enter a metastable state? a. failure to satisfy a data
ID: 3665289 • Letter: W
Question
What causes a register to enter a metastable state? a. failure to satisfy a data setup time requirement b. exceeding the maximum recommended VCC voltage c. excessive fanout d. none of the above 15) Considerr a 2-bit binary counter. What is the count sequence if the output is taken from the Q-bar outputs instead of the Q outputs? a. 0, 1, 2, 3, 0, 1,... b. 0, 1, 2, 3, 4, 0,.... c. 3, 2, 1, 0, 3,.... d. none of the above 16) Which of the following are invalid inputs for a D-latch? a. D = '0' b. d = '1' c. A D-latch doesn't have any invalid inputsExplanation / Answer
14)
1. Metastability in electronics is the ability of a digital electronic system to persist for an unbounded time in an unstable equilibrium or metastable state.
2. In metastable states, the circuit may be unable to settle into a stable '0' or '1' logic level within the time required for proper circuit operation.
3. As a result, the circuit can act in unpredictable ways, and may lead to a system failure, sometimes referred to as a "glitch".
4. Therefore the correct option is 'a' - failure to satisfy a data setup time requirement.
15)
1. A binary ripple counter is generally using bistable multivibrator circuits so that cache input applied to the counter causes the count to advance or decrease.
2. The out put is 0 0 0 1 0 1 2 1 0 3 1 1 4 or 0 0 0.
3. The correct option is 'd' - none of these.
16)
1. The D latch is the simple extension of the gated SR latch which removes the possibility of invalid input states.
2. When the enable line of the D latch is high, the output will always reflect the logic level which is present at the D input.
3. When the input of the D latch falls, the last state of the D latch input is trapped and held in the latch. That is why it is also called as a transparent latch. When enable is asserted, the latch is said to be transparent.
4. The correct option is 'c' - it does not have any invalid inputs.
17)
1. 3.5ns The correct option is 'b'.
18)
1. A circuit whose output depends not only on the present input but also on the history of the input is called a sequential circuit.
2. In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present value of its input signals but on the sequence of past inputs, the input history.
3. Therefore the given statement is FALSE. Correct option is 'b'.
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