Given a Direct-Mapped cache with 64 byte data entries , that is accessed with a
ID: 3686208 • Letter: G
Question
Given a Direct-Mapped cache with 64 byte data entries, that is accessed with a 12 bit line field, and assuming that address 64 is currently in the cache, which address could not also be present in the cache? (Select all correct answers)
131,027
131,028
262,208
262,271
262,272
2. Given a Direct-Mapped cache with 32 byte data entries, that can hold 64k total bytes of data, and assuming that address 127 is currently in the cache, which address could not also be present in the cache? (Select all correct answers)
f. 65,662
g. 65,663
h. 65,664
i. 131,200
131,201
Given a 4-way set associative cache that can hold 1MB of data, with 64 byte cache line entries and 64-bit virtual addresses. Calculate the LINE # in hex
for memory address A457 F1BC C329 0F91.
Give your answer in hex digits.
(Choose two) Which of the following is true of cache levels?
If a miss occurs at cache level 2 then cache level 3 is searched
If a miss occurs at cache level 3 then cache level 2 is searched
Cache level 2 contains data, cache level 3 contains instructions
Cache level 3 contains data, cache level 2 contains instructions
CPU cache is generally split
CPU cache is generally unified
(Select all correct answers) Which of the following is true of temporal locality?
It is based on the assumption that addresses nearer to recently accessed addresses will be accessed in the near future.
It based on the assumption that a memory address that was recently used will be required in the near future
It results in more addresses being brought in than was orginally requested
It discards those addresses that have been least recently used.
It is used to determine which addresses should the cache should hold.
(Select all correct answers) Which of the following is true of write through?
It implies that the cache is updated on a write
It implies that memory is updated on a write
It may use the Least Recently Used algorithm
It aids in the case of system recovery
t is used during a write miss
Which of the following are true of the Instruction Fetch Unit? (choose two)
It avoids the need for the ALU to increment the PC
It eliminates excess hardware
It insures that the value in the PC is always on a word boundary
It eliminates the need for the main execution unit to write to the PC
It monitors a bus, to check when the PC is loaded
11. Which of the following are possible ways of dealing with conditional branches in pipelined computers?
a. Add a delay slot
b. Perform a write though
c. Perform a deferred write
d. Perform a write allocatio
e. Perform a write back
Explanation / Answer
Answers:
1.
Number of lines in Direct Mapped Cache = 64 byte lines
The number of bits accessed by a data line = 12 bits
The address already present in the cache = 64
The binary address of 64 = 00000000000000000 000000001 000000
The number of bits to specify line =
In direct mapped cache, the block can be found by using indexing mechanism.
The binary address of 131027 = 00000000000000011 111111111 010011
The binary address of 131028 = 00000000000000011 111111111 010100
The binary address of 262208 = 00000000000001000 000000001 000000
The binary address of 262271 = 00000000000001000 000000001 111111
The binary address of 262272 = 00000000000001000 000000010 000000
The line of the address 64 is 000000001 and it matches the address line of 262208 and 262271 addresses.
So, the addresses that do not match the address that is already present in the cache are 131027, 131028 and 262272.
4.
Cache levels:
There are 3 levels of CPU caches. They are:
So, the CPU cache is generally split.
If a cache miss occurs at one level, it proceeds to next level that is slightly larger. So, if a cache miss occurs at level 2 of the cache then level 3 of cache is searched.
So, the 2 statements that are true about cache levels are:
5.
Temporal locality:
It is a type of principle of locality in which the subroutines access relatively small portion of address space at an instant of time.
Thus, the correct statements of temporal locality are:
6.
Write through:
Thus, the correct statements of write through are:
7.
Instruction fetch unit:
The following are the two statements that satisfy the Instruction fetch unit:
11.
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