What is a superscalar architecture? What are the similarities between a pipeline

Question

What is a superscalar architecture?

What are the similarities between a pipeline and a superscalar architecture? What is the ideal speedup of a superscalar architecture?

Why don’t superscalar architectures achieve their ideal speedups in practice?

What is out-of-order (ooo) execution and describe 2 different ways that ooo execution can be realized in a superscalar architecture?

Compare the instruction dependencies that can occur in an in-order execution pipeline vs. an ooo execution superscalar. In your answer explain whether the dependencies can or cannot occur in both and why.

What are the general advantages and disadvantages of loop unrolling? Explain how dynamic scheduling works using the scoreboard technique.

Why do you think Intel choose to implement its original x86 CISC ISA using sequences of RISC

micro-ops? Why do you think Intel didn’t just scrap the x86 CICS ISA and move to a RISC ISA? What is a VLIW processor? Why is it relevant in the discussion of superscalar architectures?

What is a vector (array) processor? Describe a typical microarchitecture for a vector processor

execution unit.

What is a co-processor? What are the similarities and differences between a co-processor and a superscalar execution unit?

Explanation / Answer

2)
Pipelining Superscalar similarties:
1.

divides an instruction into steps, and since each step is executed in a different part of the processor, multiple instructions can be in different "phases" each clock.
involves the processor being able to issue multiple instructions in a single clock with redundant facilities to execute an instruction within a single core

2.

once one instruction was done decoding and went on towards the next execution subunit
multiple execution subunits able to do the same thing in parallel

3.

Sequencing unrelated activities such that they use different components at the same time
Multiple sub-components capable of doing the same task simultaneously, but with the processor deciding how to do it.

The ideal speedup of the superscalar machine is

S(m,1) = T(1,1)/T(m,1)
S(m,1) = m(N+k-1)/N+m(k-1)
As N-->infinity the speedup S(m,1)->m

1)
>A superscalar CPU can execute more than one instruction per clock cycle. Because processing speeds are measured in clock cycles per second (megahertz), a superscalar processor will be faster than a scalar processor rated at the same megahertz
>A superscalar architecture includes parallel execution units, which can execute instructions simultaneously. This parallel architecture was first implemented in RISC processors, which use short and simple instructions to perform calculations. Because of their superscalar capabilities, RISC processors have typically performed better than CISC processors running at the same megahertz. However, most CISC-based processors (such as the Intel Pentium) now include some RISC architecture as well, which enables them to execute instructions in parallel
>All processors developed after 1998 are superscalar.

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