Consider a processor with a delayed branch that has three delay slots. Three com

Question

Consider a processor with a delayed branch that has three delay slots. Three compilers compiler A, compiler B and compiler C, could run on this processor. Compiler A can fill the first delay slot 60% of the time and the second delay slot 40% of the time and the third delay slot 20% of the time (filling delay slot is independent). Compiler B can fully fill all the three delay slots. Compiler C leaves all the slots empty. Assuming that branches account for 20% of all instructions and arithmetic/logic operations for the remaining 80% of the instructions for any program, what is the improvement of CPI with compiler B compared to CPI with compiler A and compared to CPI with compiler C? Assume that CPI of arithmetic/logic operations is 1.

Explanation / Answer

The CPI of branch instrunction is 3 when none of de;ay slots are filled.

For compiler B,all the delay slots are filled ,so the overall CPI is 1.

For compiler A,CPI for branch instruction is calculated as follow:

= 3 - 1*60% - 1*40% -1*20%

=3 - 1*0.6 - 1*0.4 - 1*0.2

= 3 -0.6 - 0.4 - 0.2

=1.8

CPI for arithmatic /logic is 1.

The overall CPI is = 1.8*20% + 1*80%

                         = 1.8*0.2 + 1*0.8

                         = 0.36 + 0.8

                         = 1.16

   Co,paired with compiler A and C,Compiler B's CPI is improved by

= (1.16-1)/1.16 = 13.79%                    

Related Questions

Navigate

• Browse (All)
• Browse C
• Subjects

Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.