For this problem, we will examine the performance of the TLB only, so ignore cac

Question

For this problem, we will examine the performance of the TLB only, so ignore cache accesses. Our system has the following properties: 16-bit virtual addresses Page size of 256 bytes 8-entry fully associative TLB Assuming that the TLB has just been flushed (all entries set to invalid), answer the following questions for data accesses in the following code only (i.e. ignore instruction fetches) #define ARRAY SIZE 512 #define LEAP 4 int I; long nums [ARRAY_SIZE];//&nums; = 0 times 0100 virtual addr) for (i = 0; i

Explanation / Answer

FOR OFFSET

2^8(i.e 256)

8 bits are used for offset.

No.of sets 512/256= 2^1virtual address has 1 bit in index field

SO, the tag is 16-1=15

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