1. When adding two binary numbers represented in 2\'s complement notation, overf
ID: 3851066 • Letter: 1
Question
1. When adding two binary numbers represented in 2's complement notation, overflow occurs when the carry out from the sign bit (a) is NOT the same as to the carry bit (b) into the sign bit position. Using a and b as inputs , the boolean expression that produces a 1 indicating overflow is:
A. ab' + a'b
B. a'b' + ab
C. (a + b')(a' + b)
D. a + b
2. On a byte-addressable machine, and using Little Endian format, the hexadecimal string (32 bits) AB1F37D2 is stored in memory as
A. D2371FAB
B. AB1F37D2
C. 2D73F1BA
D. AB1F37D2
3. In a pipelined processor, each instruction is divided into 6 stages, each taking one cycle. Assuming no branching, how many cycles does it take to process 3 instructions?
A. 8 cycles B. 3 cycles C. 18 cycles D. 6 cycles
4. In a processor with cache memory, it takes 10 nanoseconds (ns) to access cache, and 200 nanoseconds to access memory. If the hit rate is 95%, what is the effective Access Time for this processor/memory organization?
A. 9.5 ns B. 19.5 ns C. 10 ns D. 1.95 ns
5. When an item (instruction or data) is accessed in memory, there is a tendency for the same item to be accessed again in the near future. This example of "Locality of Reference" is called:
A. Temporal Locality
B. Spatial Locality
C. Sequential Locaity
D. Clustering
6. A decoder with 3 input lines will have ______ output lines
A. 8 B. 3 C. 6 D. 9
Explanation / Answer
Overflow is detected when the carry-in into the sign bit is not the same as carry-out from the sign bit. Let these bits be 'a' and 'b'. When two bits are different, the best way to detect them is to pass through EXOR operation also known as 'difference operator'. Hence, the boolean expression corresponding to EXOR is a'b+ab'. So, option A is correct. Since it is byte addressable, a group of 8 bits, i.e., two hexadecimal digits from the end will be stored at consecutive memory locations according to little endian format. Hence, answer is D2371FAB. So, option A is correct. For a pipelined processor (with no branching), having 'n' instructions and 'k' stages, the total cycles required is given by the formula k+n-1. Here for n=3 and k=6, the total cycles required is 6+3-1= 8 cycles. Hence, option A is correct. The access time, T= (hit ratio)*cache time + (1-hit ratio)*memory time = 0.95*10 ns+ 0.05*200ns = 19.5 ns. Hence, option B is correct. The likelihood of something in memory to be accessed again in the near future is called 'Temporal Locality'. Hence, option A is correct. A decoder with 'n' inputs has '2^n' outputs. So for 3 inputs, 8 output lines. Hence, option 'A' is correct
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