The basic single cycle MIPS implementation in above figure can only implement so
ID: 3913864 • Letter: T
Question
The basic single cycle MIPS implementation in above figure can only implement some instructions. New instructions can be added to an existing Instruction Set Architecture (ISA), but the decision whether or not to do that depends, among other things, on the cost and complexity the proposed addition introduces into the processor datapath and control. We want to add the following instruction to ISA:
Instruction: SWI Rt,Rd(Rs) NOT LWI
Interpretation: Mem[Reg[Rd]+Reg[Rs]] = Reg[Rt]
a. Which existing blocks (if any) can be used for this instruction?
b. Which new functional blocks (if any) do we need for this instruction?
c. What new signals do we need (if any) from the control unit to support this instructi
Explanation / Answer
The given instruction and Interpretation were:
Instruction: SWI Rt,Rd(Rs) NOT LWI
Interpretation: Mem[Reg[Rd]+Reg[Rs]] = Reg[Rt]
a)Here from the above the existing blocks that can be used were:
-ALU
-Instruction Memory
-Data Memory
-And the reister files which are all ports
b)Actually, No functional blocks are needed.
c)Similarly ,as there are no need for the functional blocks so there wont be a need of new signals as well..
Related Questions
drjack9650@gmail.com
Navigate
Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.